Author name: Nemi Verploegh

Nemi works on a Vulkan compute framework at Stream HPC, after spending part of this year on the company's ROCm work with AMD. Outside of that, most of his time goes into graphics programming, usually the part where something next-gen has to run on last-gen hardware. Reading a lot of compiler output tends to turn up the occasional LLVM bug, so filing those (and now and then a patch to go with them) has become a full-time job. He also writes the occasional expert-level blog post, and spends most of his time working alongside Claude. His code and experiments are archived at [https://github.com/Nemi26](https://github.com/Nemi26 "https://github.com/Nemi26 (https://github.com/Nemi26)").

Making SIMD Code Scale to Any Vector Width

Leave a Comment / Technical / Nemi Verploegh

I will be using x86 naming throughout this post, but the concepts apply to other architectures too. Basic familiarity with SIMD and x86 assembly is assumed; uops.info and Intel’s intrinsics guide explain any instruction you don’t recognize. A lot of SIMD code, particularly in the graphics programming space, use vec3/vec4 types all over the place.

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