Technical

All technical blog posts written by people of the Stream HPC team.

PHD position at university of Newcastle

At the university of Newcastle they use OpenCL for researching the performance balance between software and hardware. This resource management isn’t limited to shared memory systems, but extends to mixed architectures where batches of co-processors and other resources make it much more complex problem to solve. They chose OpenCL as it gives both inter-node and intra-node resource-management. Currently they offer

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Porting Manchester’s UNIFAC to OpenCL@XeonPhi: 160x speedup

As we cannot use the performance results for most of our commercial projects because they contain sensitive data, we were happy that Dr. David Topping from the University of Manchester was so kind to allow us to share the data for the UNIFAC project. The goal for this project was simple: port the UNIFAC algorithm to the

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We more than halved the FPGA development time by using OpenCL

Over the past year we developed and fine-tuned a project setup for FPGA development that is much faster than any other method, including other high-level languages for making FPGA-based systems. How we did it OpenCL makes it easy to use the CPU and GPU and their tools. Our CPU and GPU developers would design software with FPGAs in

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Call for papers: SYCL workshop, 13-March-2016, Barcelona, Spain

A high-level language has been on OpenCL’s roadmap since the years, and would be started once the foundations were ready. Therefore with OpenCL 2.0, SYCL was born. To keep the pace high, a SYCL workshop is being organised. This week the call-for-papers is opened, which you can read below. 1st SYCL workshop (SYCL’16) – co-located with PPoPP’16

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